Over the last couple of years, the idea that the most efficient and high performance way to accelerate deep learning training and inference is with a custom ASIC—something designed to fit the specific ...

Hardware and device makers are in a mad dash to create or acquire the perfect chip for performing deep learning training and inference. While we have yet to see anything that can handle both parts of ...

A wave of machine-learning-optimized chips is expected to begin shipping in the next few months, but it will take time before data centers decide whether these new accelerators are worth adopting and ...

Intel and ZTE, a leading technology telecommunications equipment and systems company, have worked together to reach a new benchmark in deep learning and convolutional neural networks (CNN). The ...

Mipsology’s Zebra Deep Learning inference engine is designed to be fast, painless, and adaptable, outclassing CPU, GPU, and ASIC competitors. I recently attended the 2018 Xilinx Development Forum (XDF ...

This afternoon Microsoft announced Brainwave, an FPGA-based system for ultra-low latency deep learning in the cloud. Early benchmarking indicates that when using Intel Stratix 10 FPGAs, Brainwave can ...

What’s the killer app for FPGAs? For some people, the allure is the ultra-high data throughput for parallelizable tasks, which can enable some pretty gnarly projects. But what if you’re just starting ...

Applications and infrastructure evolve in lock-step. That point has been amply made, and since this is the AI regeneration era, infrastructure is both enabling AI applications to make sense of the ...

Multi-FPGA prototyping of ASIC and SoC designs allows verification teams to achieve the highest clock rates among emulation techniques, but setting up the design for prototyping is complicated and ...

FPGAs provide a balance of performance and flexibility required in advanced video processing applications. This white paper describes benefits of FPGAs for video streaming, content creation and AI and ...

[KF5N] admits he’s not a digital design engineer; he’s more into the analog RF side of things. But he’s recently taken on a project to communicate between a Ubuntu box and an Intel MAX10 FPGA. He did ...

A number of tools are available to help designers develop and work with FGPAS. Hymel discusses the open-source Ice40 FPGA toolchain, which includes apio, yosys, nextpnr, and Project IceStorm. He walks ...