IEEE

Characterization Methods of TMD Transistor Gate Dielectrics Targeting 1 nm EOT for 2-D CMOS Scaling

Abstract: 2-D materials show promise to possibly replace Si channel material to continue Moore’s Law scaling of transistors down to 5 nm gate lengths. The scaling opportunities of 2-D materials arise ...
IEEE

Low-Noise Reset Transistor for LOFIC CMOS Image Sensors Using a Two-Step Reset Scheme

Abstract: A CMOS image sensor (CIS) with a lateral overflow integration capacitor (LOFIC) enables high dynamic range (HDR) imaging by combining low-noise signal with high full-well capacity (FWC) ...