IEEE

Loop unrolling minimisation in the presence of multiple register types: A viable alternative to modulo variable expansion

Abstract: Modulo Variable Expansion (MVE) [1] used with software pipelining (SWP) may sacrifice the register optimality (MAXLIVE) and in general may lead to unnecessary spills or move operations ...
IEEE

Studying the impacts of loop unrolling and pipeline in the FPGA design of the Simon and RoadRunneR lightweght ciphers

Abstract: In this work, the impacts of the loop unrolling and pipeline in the FPGA implementation of the Simon and RoadRunneR lightweight ciphers is studied. To achieve this, two basic architectures ...